VLSI CAD Engineer

VLSI CAD Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Participate and engage with cross functional teams to tackle key physical design challenges. Develop innovative solutions in physical design and optimization space. Develop and support implementation flows for multiple projects and design teams. Develop and maintain custom CAD tools for implementation and signoff. Create flows to enable successful deployment of new technology nodes. Develop tools and methodologies for best-in-class PPA and productivity including ML based solutions. Collaborate with other teams such as physical design verification, RC extraction, IR and static timing analysis (STA). Work directly with EDA tool vendors to resolve tool issues and identify areas for tool improvements. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $207,673 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering or related field and 2 years experience in the job offered or related occupation.

2 years of experience with each of the following skills is required:

Utilizing experience in Physical Design tools for creating final design, bringing up the design from scratch and answering questions on tool options and settings.
Utilizing experience in Software coding by answering coding and algorithm related questions with pseudo code like TCL and Python.
Utilizing experience in VLSI design and Logic designs to understand fundamental design optimization and requirements.
Utilizing EDA tools to improve Power, Performance and Area with experience in IR, Clocking, Physical Design Verification, or Machine Learning w/ EDA tools.
Owning execution of blocks or methodology development with experience in design execution, methodology development or provision of EDA support for tools.
Physical Design CAD engineer interaction with Static Timing Analysis (STA) and Layout Verification teams.
Exposure to process nodes, including newer process nodes N7 and lower, to understand details and challenges associated with the process nodes.
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VLSI CAD Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Support and enhance the Apple synthesis flow by optimizing processes and resolving any CAD tool issues that arise during the synthesis of System-on-Chip (SoC) partitions; Work with industry-standard Electronic Design Automation (EDA) tools such as Cadence Genus and leveraging the Tel scripting language to fine-tune the synthesis flow, ensuring efficient and robust design implementation; Engage in a proactive approach to troubleshooting, debugging, and refining synthesis methodologies to maintain seamless functionality within the Apple silicon design framework; Validate and improving features that contribute to Power, Performance, and Area (PPA) enhancements; Collaborate with the vendor team to refine and optimize these features, aligning them with the unique requirements of Apple silicon; Perform an in-depth analysis of how each feature impacts PPA metrics, allowing for the identification of optimization opportunities; Perform continuous monitoring and evaluation of the effectiveness of these enhancements, which help ensure that Apple's synthesis and design methodologies remain efficient and tailored to the evolving needs of high-performance SoC designs; Conduct Synthesis and Place-and-Route (PnR) experiments on various SoC partitions to assess and validate new design features before incorporating them into production workflows; Leverage a strong understanding of Register Transfer Level (RTL) design and an analytical approach to evaluating the effects of different plugins and attributes on design metrics; Extend synthesis experiments through the PnR stage, which ensures that the correlation of Power, Performance, and Area (PPA) remains consistent across different design phases; Ensure the post-synthesis and post-PnR results are well-aligned, which leads to an accurate and efficient implementation in final production-ready designs; Collaborate with cross-functional teams, such as the Logic Equivalence (LEQ) team, to validate new features after synthesis; Ensure the synthesized design maintains logical equivalence with the original RTL; Develop automation scripts using Python to further streamline the synthesis workflow, which significantly reduces manual intervention and improves overall productivity. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $148,987 - $194,700/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering or related field.

Education and/or experience must include:

Using synthesis EDA tool, EDA tool optimization, and CAD tool troubleshooting to achieve timing closure, resolve quality-of-results issues, and improve design convergence across multiple process nodes
Utilizing scripting languages for synthesis flow automation, including fine-tuning design implementation workflows
Using scripting tools for automation development, including creating utilities and streamlining synthesis workflows
Experience with System-on-Chip (SoC) methodology, Place-and-Route (PnR) experimentation, and validation of design features to verify physical implementation feasibility, ensure design integrity, and optimize floor planning strategies
Using Register Transfer Level (RTL) design analysis to evaluate design metrics and correlation analysis
Utilizing Power, Performance, and Area (PPA) optimization, feature validation, and enhancing automation flows to meet product specifications, reduce power consumption, and maximize performance within area constraints
Using Logic Equivalence Checking (LEC) validation methods and cross-functional collaboration for design verification
Using post-synthesis and post-PnR correlation analysis to ensure accuracy in production-ready designs
Utilizing synthesis methodology development and refinement for proactive troubleshooting and debugging approach
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VLSI CAD Engineer (Electronics Engineer)

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Support and develop in-house CAD flows related to Analog and Mixed-signal simulation. Solve issues related to transistor level simulations on Analog, RF and Millimeter wave applications with Spice simulators on command-line and Virtuoso environment. Help designers in solving tool issues related to SPICE Simulation/ADE/OCEAN/Maestro tool, Circuit ERC checks with industry circuit checker tools and in developing/supporting the flow automation. Write custom scripts around the vendor tools to provide add-on functionalities to the designers. Test and verify vendor tool accuracy. Work with CAD tool vendors to identify and resolve bugs, improve tool usability, and evaluate new tools and features. Perform expert debug of design errors to direct expeditious resolution; explain user errors to designers; explain tool errors to EDA partners. Install, configure, and support foundry tech files and the testing and validation of circuit ERC checks related to Analog, Digital and Mixed-Signal designs. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering, Electronic Engineering, Computer Science or related field.

Experience and/or education must include:

Using CMOS Analog circuit SPICE simulation tools for Electrical Engineering.
Automating and developing software scripting solutions for SPICE level circuit simulation.
Developing/supporting CAD flows for Analog/RF Cellular circuit design and its automation.
Supporting Electronic Design Automation (EDA) simulation environment tools from third party vendors.
Scripting using SKILL language, Perl, Python or TCL scripting language.
Implementing knowledge of custom CMOS transistor level circuit tracing including with channel-connected regions, voltage domain interactions, Power-ground supply relations to help in the circuit design analysis.
Using Electronic Design Automation circuit tracing tools using knowledge of Analog and Digital transistor level circuits and their operations with single and multi-domain voltage rails.
Designing custom CMOS circuits to improve PPA.
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