Design Verification Engineer

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Debug reasons for failure for failed tests. Review weekly fails to find out the failing reason. Work with designers to revise tests in order to hit corner cases and to expose any potential bugs. Improve and add scripts to automate verification flows based on requests from the team. Work closely with the design team and run tests to verify the RTL design of the GPU is functionally correct and bug-free. Run numerous tests and look into waveforms and logs to pinpoint why any test is failing. Collect test data to ensure the tests are covering all the codes to ensure full design coverage. Create verification plans based on architectural specifications, improve overall verification workflow and automate whenever possible. 40 hours/week.
Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
Experience and/or education must include:

Designing at the register-transfer and logic levels of complex digital systems using modern modeling, simulation, synthesis, and verification tool
Using modern hardware description language, such as SystemVerilog
Dealing with issues of performance, portability and robustness
Understanding of systems-level issues
Machine-level code and its generation by optimizing compilers, Performance evaluation and optimization, Computer arithmetic, Memory organization and management, Networking technology and protocols, Supporting concurrent computation
Design and implement testing infrastructure for chip, write test vectors, and perform in lab testing of the chips
Chip packaging specification; test PCB design, fabrication, and population; test vector creation and test coverage evaluation; lab instrument automation; and in lab test and debug of the fabricated chips
Designing and integrating hardware subsystems
Co-designing the hardware/software interface to create a computer system that achieves functional correctness, and meets design objectives in performance, power consumption, energy efficiency, and cost.
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Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Ensure the quality of the SOC or an IP or subsystem. Review design and architecture specifications and work closely with design & micro-architecture teams. Develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. Communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. Work on one or several of the following types of IP such as Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ProRes and other codec formats such as VP9, AV1. Hardware security, including cryptographic algorithm implementations, High-Speed IO standards such as PCI Express, DisplayPort, MIPI. Power management and fabric infrastructure, Memory cache management, Memory Management Unit, and Display Subsystem for variety of panels and product. 40 hours/week.
Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.

Experience and/or education must include:

Implementing Computer Architecture to understand micro-architecture
Utilizing System Verilog/UVM to develop test-bench code and test-sequences
Using Python or Perl for scripting
Using NCSIM and Xcelium for waveform debug
Using C++ for writing CPU code
Utilizing assertions writing to verify RTL
Implementing Digital Design knowledge to understand design architecture
Utilizing functional coverage and code coverage understanding to test coverage holes
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