Digital Circuit Design Engineer

Digital Circuit Design Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Design and implement custom digital circuits for SRAM design. Work with an extraordinary logic/architecture team to formulate design specifications. Define architecture/topologies optimizing for power, timing, area and yield. Perform schematic capturing, simulations/analysis, and margin verifications. Responsible for functional equivalency and DFT modeling. Work with layout team to create optimal GDS. Verify extracted GDS meets design specifications. Responsible for backend verification of layout, including IR/Electromechanical analysis. Write RTL, validating use-cases, verifying against design schematics. Support post-silicon effort to enable productization. 40 hours/week.
Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.

Experience and/or education must include:

Utilizing CAD tools including Cadence Virtuoso, Spice, Layout tools, Skill language, Model Sim, Digital P&R, compilers, or simulators for design entry and analysis.
Debugging simulation failures and chip simulations on CAD software for logical and timing verification.
Utilizing knowledge of device physics and transistor for circuit optimization.
SRAM design skills to build and evaluate memory circuits.
Analyzing circuits and SPICE simulation to ensure robust operation.
Utilizing waveform viewers including SpiceExplorer or WaveView to verify circuit logic and timing.
Static Timing Analysis of an SRAM design, using NanoTime, PrimeTime or similar for static timing verification.
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Digital Circuit Design Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Design and implement custom digital circuits for SRAM design. Work with an extraordinary logic/architecture team to formulate design specifications. Define architecture/topologies optimizing power, timing, area and yield. Perform schematic capture, simulations/analysis, margin verifications. Conduct functional equivalency and DFT modeling. Work with layout team to create optimal GDS. Verify extracted GDS meets design specifications. Perform backend verification, IR/EM. Write RTL, validating use-cases, verifying against design schematics. Support post-silicon effort to enable productization. Collaborate with all fields, playing a strategic role of getting functional products to millions of customers quickly. Integrate and come up with new insights, work with a team of hardworking engineers, and implement groundbreaking techniques of Machine Learning, Circuit design in Apple’s marquee products like M1 and A14 Bionic. 40 hours/week.
Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.

Experience and/or education must include:
Utilizing CAD tools including Cadence Virtuoso, Spice, simulators for design entry and analysis.
Debugging simulation failures on CAD software for logical verification.
Utilizing knowledge of transistor for circuit optimization.
Using clock gating and power gating for circuit power optimization.
Utilizing SRAM design skills to build and evaluate memory circuits.
Analyzing circuits and SPICE simulation to ensure robust operation.
Utilizing waveform viewers including Spice Explorer to verify circuit logic and timing.
Static Timing Analysis using PrimeTime or similar for static timing verification.
N/A

Digital Circuit Design Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Ensure that all pre-silicon deliveries of custom IPs for Apple Socs are bug free. This involves working closely with circuit and RTL (Register Transfer Level) designers to validate design functionality, optimize performance, and ensure that the design complies with the architectural specifications. Review design and architectural specifications to understand use cases and corner conditions, then translate these into testbenches, including key verification components such as stimulus generation, checkers, assertions, and functional coverage, utilizing SystemVerilog and UVM (Universal Verification Methodology) which offers a more standardized and scalable verification approach. Ensure that the RTL/Verilog design files are bug free and match the specifications and requirements. Run and debug simulation regressions, triage failures, track bugs, and perform detailed coverage analysis to ensure high-quality verification results. Generate and analyze Toggle Coverage reports to verify complete signal toggling for each design. Leverage industry-standard tools such as Verdi and Cadence lndago for debugging simulation-waveforms, analyzing environment hierarchies, and bug resolution in complex verification environments. Develop and use Perl and Python-based automation scripts for automatic testbench generation and verification workflows, improving efficiency and reducing manual effort. Work with circuits pertaining to SRAMs, register files, and caches, applying academic knowledge in VLSI and circuit design to verify custom memory architectures. Refactor testbench code to enhance reusability and maintainability, eliminating hardcoded values and ensuring a modular verification environment. Use version control systems such as Perforce, documentation platforms like Confluence, and proprietary task management tools for effective cross-functional collaboration. 40 hours/week.
Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, or a related field.

Experience and/or education must include:

Utilizing SystemVerilog or Verilog to develop RTL verification testbenches for digital circuit designs, including simulation and analysis of design behavior.
Utilizing Universal Verification Methodology (UVM) or equivalent methodology to develop verification environments, including monitors and scoreboards.
Performing RTL design verification and debug using industry-standard waveform and simulation debug tools to identify functional failures and isolate root causes.
Verifying digital memory and custom circuits (e.g., SRAM, register files, or other IP blocks), including read/write operations, timing behavior, and corner-case functionality.
Utilizing formal verification tools, including Logical Equivalence Checking (LEC) or ESPCV or equivalent, to validate equivalence between RTL and synthesized netlists.
Utilizing Python, Perl, or C++ to automate verification flows, regression execution, and test generation.
Utilizing regression management and revision control systems to execute automated regression test suites and track changes across RTL and verification environments.
Applying digital circuit fundamentals, including synchronous logic, finite state machines, timing analysis, and clock/reset behavior, to support design verification.
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