Design Verification Engineer

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Responsible for verifying complex digital IPs. Work with the system architects and digital designers, making block level specifications clear and precise. Use the specifications to build verification plans to exercise the functional, performance, stress cases, and error conditions. Own the creation of the verification test benches using formal verification and UVM based simulation. Build the test cases using System Verilog Assertions and constrained random UVM testcases to get complete functional and code coverage for your blocks. Participate in code reviews of other blocks in the chips, offering proposals to more efficiently achieve bug free designs on the first tape out. Collaborate in developing precise design specifications for digital control blocks. Use design specifications to create block and chip level verification plans. Architect and create block level verification elements. Assist in architecting chips and system level verification environments. Use System Verilog and UVM to develop drivers, tests, reference models and checkers. Debug test failures and work with designers to develop fixes. Using functional and code coverage to track progress and gauge tape out readiness. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $149,987 - $194,700/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, or a related field.
Experience and/or education must include:

Utilizing System Verilog to create block level verification elements.
Utilizing Verilog, VHDL to debug design issues and to root cause bugs.
Utilizing Digital Hardware Simulation to develop checkers and tests.
Utilizing Object Oriented Programming, C to understand and debug C program executions on the chips.
Utilizing Python, Perl, or algorithms to develop automation flows.
Utilizing Chip simulations on CAD software including debugging of simulation failures.
Utilizing Finite State Machine design and verification experience to ensure design quality.
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Understand details of High-Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory Controller Sub Systems, USB, PLL, power-up, Secured Boot schemes. Create coverage driven verification plans from specifications, review and refine to achieve coverage targets. Create IP level module and sub-system verification plan, TB, portable test benches, sequences, and test infrastructure. Architect highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites to SOC level, achieve targeted coverage, working with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design. Work closely with DV methodology architects to improve verification flow. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, Computer Science, or a related field.
Experience and/or education must include:

Using hardware description languages like Verilog to develop testbenches, reference models, understand, verify and debug digital designs.
Implementing programming languages like C/C++, object-oriented programming to work with system models, design reference models, stimulus drivers that need object-oriented concepts.
Using combinational and sequential circuits designs to understand, verify and debug digital designs.
Understanding of Microprocessors architecture, processor organization, instruction set architecture to work on microprocessor design verification, integration and debug.
Understanding advanced computer architecture concepts to work on CPU integration and verification.
Knowledge of Microelectronics and semiconductor physics to work on digital and mixed-signal models, integration, debug.
Understanding of computer networking, design of communication protocols and wireless networks to work on design of reference models and verification of wireless chips.
Understanding of parallel computing to work on multi-threaded design, stimulus generation and using mutex, semaphore and parallel computing concepts.
Using Unix/Linux operating system to execute on all job functions including file management, system monitoring, automation through scripting.
Using scripting languages such as Python to work on system testbenches and automate verification flows.
N/A

Design Verification

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with RTL designers and architects to understand and review specifications and architecture and extract features as part of the verification team supporting Apple's Display Technologies portfolio for the next-generation of Apple products. Develop verification strategies, including test plans and coverage requirements to cover the functional and performance requirements of the design. Design, implement, and maintain scalable and re-usable SystemVerilog UVM based test-benches for SOC and sub-system level verification. Update environment scripts (Python) to support new test configurations. Write and maintain test cases using directed/constrained random test generation and assertion-and formal-based verification. Create coverage models and tracking coverage metrics to ensure 100% coverage goals are met. Run RTL and gate-level simulations investigating failures from daily/nightly simulations run at chip/block level, using log analysis and waveform tools (lndago/SimVision) to review them with the RTL designers and file bug reports as appropriate. Build and maintain automated regressions; Coordinate with architects/designers for end-to-end validation; Create and maintain up-to-date documentation for test plans, attributes, and verification environment. Support scripted automation flows as needed to enhance the verification methodology. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.
Experience and/or education must include:

Using Verilog and SystemVerilog for testbench and constrained random test development to build the verification infrastructure.
Testplan and coverage plan development in order to plan the test scenarios and the features that need to be covered.
Using C or C++ to be used for reference model or checker development to check the correctness of the design behavior.
Perl, Python, or tcl scripting to set up the regression automation flow which facilitates running test suites.
Knowledge of Digital Electronics and RTL design concepts to understand the design microarchitecture.
Experience with simulators and waveform viewers for running tests, debugging digital designs and finding bugs.
Understanding and knowledge of writing System Verilog Assertions (SVA) for simulations-based and formal verification to be used for checker development.
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Design Verification of Analog and Mixed Signal ASIC Ips and ensure bug-free first silicon for part of the System on a Chip (SoC)/IP. Develop detailed test and coverage plans based on the micro-architecture. Develop verification methodology suitable for the IP to ensure a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, and coverage. Execute verification plans, including design bring-up, DV environment bring up, regression enabling all features, and debug of the test failures. These pre silicon verification environment creation and execution helps in making sure ASIC (Application Specific Integrated Circuits) works correctly once it is manufactured. Develop block, IP and SoC level test-benches example for camera interface, usb3 controller interface. Track and report DV progress using a variety of metrics, including bugs and coverage. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, or a related field.
Experience and/or education must include:

Using Verilog, System Verilog to create complex verification environment to simulate pre-silicon all possible use cases.
Using basics of digital design and verification to test the design and debug the failures.
Using Python to enable creation of validation scripts.
Using Computer Architecture to understand the use case of the soft IP cores and how it inter-operates with the various GPU sub-systems.
Using UVM (Universal Verification Methodology) in verification environments.
Using scripting languages like Perl to create executable scripts.
Using industry standard simulation and debugging tools such as VCS from Synopsys, Verdi debugger, or Indago debugger.
Implementing different aspects of verification flow such as constrained randomization Using functional/code coverage, assertion methodology to improve quality of pre-silicon verification and measure the completeness of pre silicon verification.
N/A

Design Verification

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Responsible for low power verification of various Apple SOC. Review power related aspects of design and architecture specifications of SOCs and corresponding Power Manager SOCs and work closely with design, architecture, software teams to identify attributes that need to be tested. Develop test plan and coverage plans and develop, define test benches needed for executing on the test plan. Develop specific test plans to verify low power functionality of various system on chip designs. Develop specific test plans to verify hardware within system on chip responsible for restoring hardware to correct state as chip goes through power state transitions. Create directed and random tests for testing the integration of power manager. Write tests in C programming language for testing the hardware. Create system Verilog behavioral models and stimulus to test the simulation of system on chip with power manager chip together. Write scripts in Perl and Python programming languages to automate the verification of test plan. Create scripts and regressions to track and maintain chip simulations. Run chip level simulations using CAD software. Use AXI,AMBA Protocols to verify integration of various blocks within chip and debug failing test cases. File bug reports for simulation failures and track them until fix and closure. Work independently and manage deliverables to align with project goals and support cross functional engineering efforts. 
 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Bachelor’s Degree or foreign equivalent in Computer Science, Computer Engineering or related field and 2 years of experience in the job offered or related occupation.
2 years of experience with each of the following skills is required:

Using digital and logic design concepts to understand the process of hardware design and verification
Utilizing ARM/X86 based Computer architecture to drive processor-based verification stimulus
Using data structures and algorithms to write efficient C based stimulus for chip level verification
Utilizing System Verilog to create stimulus and behavioral models to validate chip design systems
Using C to write chip level test cases that drive stimulus
Utilizing Perl or Python to automate tasks like running testcases, failure triaging and regression maintenance.
Utilizing low power design fundamentals specific to CMOS based designs.
Using languages including UPF to describe power intent for hardware designs
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Review the design specifications, extracting attributes, and reviewing the test plan with verification, design and cross functional teams. Generate coverage databases and collaborating with design team to close the coverage. Develop regression scripts and running regressions on Apple‘s regression infrastructure. File tickets to track RTL bugs, providing designers with the waveform of the bug and the reproduction command. Develop test bench environment(s), directed and random/constrained tests to completely verify the design features. Develop functional coverage metrics to meet the verification goals. Develop reusable and scalable testbenches which can be easily integrated in higher level environments. Plan and develop checkers to identify design bugs. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.
Experience and/or education must include:

Using SystemVerilog for constrained random test development
Using C for reference model and checker development.
Utilizing Perl, Python, or shell scripting for regression automation.
Applying Digital Electronics concepts to understand the design under test.
Utilizing simulators and waveform viewers, including VCS or Verdi, for running and debugging simulations.
Utilizing CPU architecture knowledge for verifying CPU based designs.
Using knowledge of Verilog RTL design constructs for debugging designs.
Using MATLAB to create models used in verification.
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Understand the design specification and extract attributes of the design from the specification. Create UVM based tests and sequences based on attributes to stress the design and verify correctness of the RTL. Have discussions with Design Engineers regarding missing specifications, corner cases/interesting scenarios where the design might show unexpected behavior. Debug root cause of failure and reporting the bug to design engineer using waveform analysis/log files. Work with EDA vendors to use VIP/tool in our test benches. Develop Coverage points to analyze coverage and writing Assertions for the design. Understand the design, extracting attributes from the design specification and verifying correctness of the RTL design. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Electrical and Computer Engineering or related field.
Experience and/or education must include:

Experience in Hardware Verification Language (HVL) and Hardware Design Language (HVL) including System Verilog or Verilog for Verification Environment and test development.
Utilizing knowledge of HVL methodology (UVM, OVM, and VMM) for constrained random test development.
Applying verification skills in problem solving, constrained random testing, and debugging.
Understanding of reusable verification framework to help speedup verification process.
Utilizing knowledge of digital logic design, chip architecture and microarchitecture to help analyze and debug RTL design.
Applying AMBA protocol knowledge in developing monitor/checker and analyzing RTL design
System Verilog Assertion (SVA) for verification.
Programing in C/C++ for embedded CPU verification and system modeling
Writing scripts in languages including Perl or Python.
Defining coverage space and writing coverage model to measure verification quality and find verification holes.
N/A

Design Verification

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Design and architect specifications and work closely with design & micro-architecture teams. Understand the functional & performance goals of the design. Develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. Communicate and collaborate with design, architecture and software teams to understand the use cases and corner conditions and drive test cases. Ensure the quality of the SoC, IP, and/or subsystem by working on one or more types of IP such as Neural Engine hardware, DRAM subsystems, memory controller logic, Encode and Decode systems for ProRes and other codec formats (such as VP9 and AV1), hardware security including cryptographic algorithm implementations), high-speed IO standards (such as PCI Express, DisplayPort, MIPI), power management and fabric infrastructure, memory cache management, and display subsystems for variety of panels and products.
 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering or Computer Engineering or related field and 3 years of experience in the job offered or related occupation.

3 years of experience with each of the following skills is required:

Utilizing SystemVerilog and UVM methodology to implement scalable and reusable verification environment and test cases to verify designs.
Utilizing VCS, xcelium or modelSim tools to run RTL, gate, and power aware simulations.
Utilizing formal verification tools (JasperGold) for connectivity, assertion based functional and unreachability formal analysis.
Utilizing coverage tools (Mentor InFact, Cadence vManager/IMC) for code and functional coverage analysis and closure.
Applying C and/or C++ functional and performance models in verification.
Applying knowledge in computer architecture and digital design in failure analysis and hardware debug.
Utilizing waveform debug tools (Indago and Verdi) to triage and debug functional and performance issues.
Developing and conducting test plans and test attributes based on design specifications.
Experience in scripting languages PERL, tcl, and python for aiding verification.
Using version control tools Perforce, Git, and Clearcase for source code control.
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Ensure bug-free first silicon for part of the SoC/IP. Develop detailed test and coverage plans based on the micro-architecture. Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. Learn to develop verification plans for all features under executing verification plans, including design bring-up, DV environment bring- up, regression enabling all feature and debugging of the test failures. Develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. Writing scripts in Python or TCL. Developing stimulus and checkers to ensure analog and digital circuit interactions work seamlessly. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
Experience and/or education must include:

Using Digital design and analog knowledge to create architecture and micro-architecture for the designs.
Using Verilog knowledge to create synthesizable digital designs and test-benches to verify the designs.
Using C and C++ to create reference models of the design under test to accurately predict design behavior
Utilizing python for data analysis/processing, visualization, and machine learning implementation.
Executed chip design flow from specification to verification closure.
Experience with matlab programming to analyze probabilistic modelling and data analysis.
Using scripting languages like Perl or Python to create executable scripts.
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with architecture and design teams to review design requirements, develop architectural specifications and check specifications for correctness. Develop system Verilog based golden reference model to mimic the logical behaviors of RTL designs, according to the specification. Develop system Verilog assertions and checkers for testing the RTL design. Develop assembly language or Perl and Python based directed tests and constrained random stimulus for design features. Run test simulations of RTL design using simulator and emulator tools. Debug failures observed in RTL simulations and work with RTL design team on fixing the bugs. Develop coverage constructs; collect coverage from RTL regressions and review code, functional coverage. Involved in the formal verification of our design using jasper formal tool. Develop manual or automated formal checks to better verify the design. Run the checks through formal verification tool and debug any failures observed. Develop Perl and Python scripts for automating different part of the testing environment. Summarize failures from regressions, develop formal connectivity checks, auto file tickets from regression reports. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master's degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.

Experience and/or education must include:

Basic semiconductor physics.
CMOS and/or VLSI Design
Computer and Processor Architecture
Design verification and functional coverage
Developing RTL for digital logic blocks using SystemVerilog, including linting and synthesis readiness.
Low-power techniques including clock gating, power gating, and multi-voltage designs
Experience in computer architecture specification and performance analysis, including determining initial microarchitecture specification of a design.
Object oriented programming, C, C++, System Verilog, Python, Perl, and algorithm
Parallel Computer Architecture
Test and scripting: Perl, Tcl, shell, Makefile, and Python
N/A

Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Ensure the quality of the SOC or an IP or subsystem. Review design and architecture specifications and work closely with design & microarchitecture teams. Understand the functional & performance goals of the design and use knowledge to test effectively. Develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. Communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases; and run and triage regressions, track bugs, and analyze coverage to achieve top results. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $194,700/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electronics Engineering or related field.

Experience and/or education must include:

Utilizing System Verilog to build scalable and reusable testbenches for SoC verification
Scripting using Perl and Python for testbench simulation flows automation
Using digital design concepts for functional verification of RTL DUT (design-under-test)
Utilizing Computer Architecture concepts for verifying SoC architecture and design
Utilizing System Verilog to create constrained random stimulus for RTL DUT verification (design-under-test)
Utilizing UVM to build test benches for constrained random verification of SoC IPs
Utilizing design verification concepts such as functional coverage metrics for SoC design verification
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Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Ensure bug-free first silicon for part of the SoC / IP and developing detailed test and coverage plans based on the micro-architecture. Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage, and developing verification plans. Execute verification plans, including design bring-up, DV environment bring- up, regression enabling all features under your care; and debugging of the test failures. Develop block, IP and Soc level test-benches track, and reporting DV progress using a variety of metrics, including bugs and coverage. Develop tests for digital and analog co-simulations. Execute Low Power simulations with Firmware and UPF. Deliver tests and sequences for ATE based electrical characterization. Participate in Post Silicon bring-up and debug. Develop testplan, tests, checkers for Firmware verification to ensure bug free Firmware delivery for the IP. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.

Experience and/or education must include:

Computer architecture and VLSI design
Writing synthesizable RTL code in Verilog
Verifying a digital design
Using Python to automate design verification tasks for efficiency and increased productivity
Utilizing System Verilog to create Testbench for IP Level and System Level Verification
Participating in development and review of test plan, based on design specifications
Using C and C++ programming to model hardware behavior
Performing functional and timing simulations for verification, debug or performance analysis
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Design Verification Engineer

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Design and implement testbench environments and test cases. Engage in regular meetings with design and micro architecture teams to comprehend the functional and performance objectives of the ongoing design projects. Thoroughly examine and assess design specifications to gain a comprehensive understanding of the project requirements. Identify potential areas for improvement or clarification. Establish a robust testbench methodology tailored to project requirements, ensuring efficient verification processes. Write Tests and Generate Test Coverage. Develop System Verilog checkers using UVM methodology to verify new debug features. Regularly update and enhance test cases to adapt to evolving project needs. Execute regular regression tests to validate the functionality and performance of the design under various scenarios. Analyze test failures, trace signals using tools like Verdi, and collaborate with the design team to address issues. Take ownership of individual tasks and deliverables, ensuring alignment with project goals and timelines. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. 

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.

Experience and/or education must include:

Writing System Verilog/Verilog RTL code to model digital circuits and digital designs.
Using System Verilog/Verilog for developing testbench code using logic design principles.
Using System Verilog/Verilog to debug RTL and testbench code.
Developing System Verilog/Verilog to develop test benches using randomized tests.
Developing UVM testbenches to verify functional correctness.
Using UVM testbenches and System Verilog/Verilog to ensure that specified design objectives such as performance, power are being met.
Utilizing Computer Architecture for SOC architecture and design.
Utilizing design verification concepts such as functional coverage metrics to verify SOC design.
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